[ bianca ]

Source Package: covered (0.7.10-5)

Links for covered

Maintainers:

External Resources:

Homepage [covered.sourceforge.net]

The following binary packages are built from this source package:

covered: Verilog code coverage analysis tool
covered-doc: Verilog code coverage analysis tool - documentation

Other Packages Related to covered

build-depends

build-depends-indep

adep: debhelper-compat (= 13)

Package not available
adep: flex

fast lexical analyzer generator
adep: bison

YACC-compatible parser generator
adep: gperf

Perfect hash function generator
adep: tcl-dev

Tool Command Language (default version) - development files
adep: tk-dev

Toolkit for Tcl and X11 (default version) - development files
adep: libxft2-dev

virtual package provided by libxft-dev
adep: iverilog

Icarus verilog compiler

or verilog

virtual package provided by iverilog
adep: gplcver (>= 2.12a-1.1)

Verilog simulator

Download covered

File	Size (in kB)	MD5 checksum
covered_0.7.10-5.debian.tar.xz	6.3 kB	7226f6b027e23f8cf086af1db4ea734e
covered_0.7.10-5.dsc	1.8 kB	460d515f060447bafa7116ee1dadc9b4
covered_0.7.10.orig.tar.gz	3,035.4 kB	7f79e93471546810b166e9104236bda2

Debian Package Source Repository (VCS: Git): https://salsa.debian.org/electronics-team/covered.git
Debian Package Source Repository (Browsable): https://salsa.debian.org/electronics-team/covered