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[ 原始碼: adms ]
套件:adms(2.3.7-1 以及其他的)
Automatic device model synthesizer for Verilog-AMS
ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile c code for the API of spice simulators. Based on transformations specified in xml language adms transforms Verilog-AMS code into other target languages.
其他與 adms 有關的套件
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- dep: libadms0 (= 2.3.7-1+b2)
- Shared library for automatic device model synthesizer
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- dep: libc6 (>= 2.34)
- GNU C Library: Shared libraries
同時作為一個虛擬套件由這些套件填實: libc6-udeb