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[ Paquet source : yosys ]
Paquet : yosys-abc (0.52-2)
Liens pour yosys-abc
Télécharger le paquet source yosys :
- [yosys_0.52-2.debian.tar.xz]
- [yosys_0.52-2.dsc]
- [yosys_0.52.orig-abc.tar.gz]
- [yosys_0.52.orig.tar.gz]
Responsables :
Ressources externes :
- Page d'accueil [github.com]
Paquets similaires :
Sequential Logic Synthesis and Verification Algorithms
ABC is a system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. It combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification.
This is a fork of berkeley-abc maintained by the YosysHQ team for use in the yosys RTL synthesis framework.
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Télécharger yosys-abc
| Architecture | Taille du paquet | Espace occupé une fois installé | Fichiers |
|---|---|---|---|
| amd64 | 4 828,6 ko | 12 925,0 ko | [liste des fichiers] |
| arm64 | 4 271,9 ko | 12 054,0 ko | [liste des fichiers] |