[ bianca ]
[ Source: yosys ]
Paketti: yosys-abc (0.52-2)
Links for yosys-abc
Imuroi lähdekoodipaketti yosys:
- [yosys_0.52-2.debian.tar.xz]
- [yosys_0.52-2.dsc]
- [yosys_0.52.orig-abc.tar.gz]
- [yosys_0.52.orig.tar.gz]
Ylläpitäjät:
External Resources:
- Kotisivu [github.com]
Samankaltaisia paketteja:
Sequential Logic Synthesis and Verification Algorithms
ABC is a system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. It combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification.
This is a fork of berkeley-abc maintained by the YosysHQ team for use in the yosys RTL synthesis framework.
Muut pakettiin yosys-abc liittyvät paketit
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- dep: libbz2-1.0
- high-quality block-sorting file compressor library - runtime
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- dep: libc6 (>= 2.38)
- GNU C Library: Shared libraries
myös näennäispaketti, jonka toteuttaa libc6-udeb
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- dep: libgcc-s1 (>= 3.0) [amd64]
- GCC support library
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- dep: libreadline8t64 (>= 6.0)
- GNU readline and history libraries, run-time libraries
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- dep: libstdc++6 (>= 13.1)
- GNU Standard C++ Library v3
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- dep: zlib1g (>= 1:1.1.4)
- compression library - runtime
Imuroi yosys-abc
| Arkkitehtuuri | Paketin koko | Koko asennettuna | Tiedostot |
|---|---|---|---|
| amd64 | 4,828.6 kt | 12,925.0 kt | [tiedostoluettelo] |
| arm64 | 4,271.9 kt | 12,054.0 kt | [tiedostoluettelo] |